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Construction Order – It’s usually easiest to get things correct if you build your circuit with the logic elements (gates, inputs, outpus) first then go and connect them with wires.
Cutting and Pasting – Be cautious with cutting and pasting, especially when there are existing wires where you are pasting. It is not a guarantee that your pasted element will be connected to the wire or not automatically connected to a wire in the pasted area. It’s best to remove wire segments in the pasted area, paste your logic element, then reconnect it with the wire tool.
Unconnected Wires – Make sure that your wires are actually connected to the input/output or gate wires. If you move a logic element, the connected wires should move as you move around the logic gate. (Hit undo if you drop the moved gate into a bad place)
Multiple Connected Short-Circuited Wires – This is a particularly nasty issue because it’s tricky to see in the editor. This can usually be avoided by following the construction orders and cut/paste rules above. Sometimes you may drag the wire tool and it will make a junction with another wire that is unwanted. If you can’t figure out where the short is located, you can double-click on the error message. It should take you to at least the correct file and wire. If you can’t find the short, it’s usually easiest to delete all of the related connections and re-do them, ensuring that no short circuits are introduced.
Cannot Query JTAG Chain
JTAG is the protocol that runs over the USB cable to configure the FPGA from the workstation. There are two basic issues that students commonly have if there are JTAG issues.
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